For DAL A or B, the detailed design (HDL or analog representation, implementation constraints such as timing, pinout and I/O behaviour, and a description of the hardware/software interface) is reviewed against the design standards, and the trace links from the custom device requirements to the detailed design are reviewed, to show the design covers the requirements, agrees with the conceptual design and complies with the hardware design standards. For DAL C, the detailed design is shown to satisfy the design standards.
This control maps to 1 controls across 1 other frameworks. If you already hold one of them, the evidence you collected for it is the starting point here rather than new work.
Every mapping shown was judged rather than inferred from wording similarity, and the ones that failed review are published too. See the coverage reports and what was rejected.
The graph holds this control, the 1 it maps to, and the evidence behind each claim, over MCP and REST.