The hardware is integrated and verified against the hardware safety requirements using the methods of the part's tables for deriving test cases and for test methods by ASIL (part 11 Tables 27 and 28 interpret Tables 10 and 11 for semiconductors), including safety mechanism verification, environmental and stress tests and fault injection where applicable. Clause 10's aim, as the SGS assessment report quotes it, is to make sure the developed hardware complies with the hardware safety requirements; the report names deriving test cases, integration testing for completeness and correctness of the safety requirement implementation, and testing for durability, robustness and operation under stress as the audited activities. Requirement text not held.
This control maps to 1 controls across 1 other frameworks. If you already hold one of them, the evidence you collected for it is the starting point here rather than new work.
Every mapping shown was judged rather than inferred from wording similarity, and the ones that failed review are published too. See the coverage reports and what was rejected.
The graph holds this control, the 1 it maps to, and the evidence behind each claim, over MCP and REST.