Capturing requirements, conceptual and detailed design, implementation, and transition to production may apply at any level (LRU, board, ASIC or PLD), are planned and recorded in the hardware design plan, and may iterate, with each change's effect on earlier iterations evaluated. Whatever design representation is used (schematics, HDL, state diagrams, Boolean or graphical), the guidance applies; the representation should allow consistent replication of the item; the assurance impact of small representation changes that may have large implementation effects is addressed; and if the representation environment changes after the design baseline, the effect on replication is assessed. HDL designs, though code-like, are subject to this hardware guidance rather than software verification methods.
The graph holds this control, the 0 it maps to, and the evidence behind each claim, over MCP and REST.