COTS devices (packaged semiconductor products contributing to DAL A to C, including the COTS part of FPGAs with embedded hard IP) are assessed for complexity, considering all functions including unused ones: a device is complex if it has interacting functional elements, many functional modes, and configurable functions allowing different data flows and resource sharing, or if it contains multiple processing elements, advanced switching or advanced data processing (multicore, graphics, networking, complex bus switching, multi-master interconnects). The relevant devices (not the whole bill of materials), their classification and rationale, especially for boundary devices classed simple, are documented in planning.
This control maps to 1 controls across 1 other frameworks. If you already hold one of them, the evidence you collected for it is the starting point here rather than new work.
Every mapping shown was judged rather than inferred from wording similarity, and the ones that failed review are published too. See the coverage reports and what was rejected.
The graph holds this control, the 1 it maps to, and the evidence behind each claim, over MCP and REST.